----------------------------------------------------------------------------------
--
-- Module Name:    find110 - Behavioral
--
-- This module scans the input signal, sig, which is assumed to be synchronous,
-- and generates the output, found, one cycle after the sequence 1,1,0 is detected.
-- 
-- Create Date:    03/28/2012 
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity find110 is
    Port ( clk : in  STD_LOGIC;    -- clock
           rst : in  STD_LOGIC;    -- reset, active high
           sig : in  STD_LOGIC;    -- input signal for sequence detection
           found : out  STD_LOGIC);-- output, becomes active when 110 is detected
end find110;

architecture Behavioral of find110 is
	type detector_state is (found_nothing, found_1, found_11, found_110);
	signal state, next_state: detector_state;
begin

	-- state register
	process (clk, rst)
	begin
		if rst = '1' then
			state <= found_nothing;
		elsif clk'event and clk = '1' then
			state <= next_state;
		end if;
	end process;
	
	-- next state decoder
	process (state, sig)
	begin
		case state is
		when found_nothing =>
			if sig = '1' then next_state <= found_1; else next_state <= found_nothing; end if;
		when found_1 =>
			if sig = '1' then next_state <= found_11; else next_state <= found_nothing; end if;
		when found_11 =>
			if sig = '0' then next_state <= found_110; else next_state <= found_11; end if;
		when others =>
			if sig = '1' then next_state <= found_1; else next_state <= found_nothing; end if;
		end case;
	end process;
	
	-- output decoder
	found <= '1' when state = found_110 else '0';

end Behavioral;